hci_core_mux_dynamic
The HCI multiplexer can be used to funnel more input "virtual" HCI channels in into a smaller set of initiator ports out. It uses a round robin counter to avoid starvation, and differs from the modules used within the logarithmic interconnect in that arbitration is performed depending on the round robin counter and not on the target port; in other words, its task is to fill all out ports with requests from the in port, and not to route in requests to a specific out port.
Notice that the multiplexer is not "optimal" in the sense that there is no reorder buffer, so transactions cannot be swapped in-flight to optimally fill the downstream available bandwidth. However, in real accelerators many systematic issues with bandwidth sharing can be solved by upstream HCI FIFOs and by clever reordering of channels, since the dataflow schedule is known. For a multiplexer with reorder buffer, see hci_core_mux_ooo.
Name |
Default |
Description |
NB_IN_CHAN |
2 |
Number of input HWPE-Mem channels. |
NB_OUT_CHAN |
1 |
Number of output HWPE-Mem channels. |
This module instantiates no other module.
Clocks
Resets
Ports 5
Inputs 4
| Dir | Name | Type | Width |
|---|---|---|---|
| in | clk_i | logic | 1 |
| in | rst_ni | logic | 1 |
| in | clear_i | logic | 1 |
| in | in | hci_core_intf .target | - |
Outputs 1
| Dir | Name | Type | Width |
|---|---|---|---|
| out | out | hci_core_intf .initiator | - |
Parameters 10
| Name | Resolved value |
|---|---|
| NB_IN_CHAN | 32'd2 |
| NB_OUT_CHAN | 32'd1 |
| HCI_SIZE_in | 224'h0 |
| DW | 32'd0 |
| BW | 32'd0 |
| AW | 32'd0 |
| UW | 32'd0 |
| IW | 32'd0 |
| EW | 32'd0 |
| EHW | 32'd0 |