module

datamover_buffer

datamover rtl/datamover_buffer.sv:23 elaboratedas datamover_top_wrap.i_datamover_top.i_engine.i_buffer

6in

1out

0sub

Interface

the boundary of datamover_buffer — it instantiates no other module

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The ports stand at the walls of the module frame: input, left · output, right · interface — a slanted green box is a stream or a bus; the wide green line carries its data, and the arrow gives the direction · control — the dashed amber line shows which module controls what · flag / status · no direction. A straight box is a module. A hexagon is a port that goes in two directions. A dashed inner box is a generate block. The dashed white node is the logic of the module itself: the processes that drive or read a control net. The clock, reset, clear and test-mode nets are not in the graph; the chips below the diagram give them.

Clocks

clk_i

Resets

rst_niactive-low

Clears

clear_isynchronousclear_matrix_isynchronous

Ports 7

Inputs 6

Dir	Name	Type	Width
in	clk_i	logic	1
in	rst_ni	logic	1
in	clear_i	logic	1
in	clear_matrix_i	logic	1
in	wr_row_en_i ctrl	logic[63:0]	64
in	wr_row_data_i	logic[63:0][7:0]$[63:0]	-

Outputs 1

Dir	Name	Type	Width
out	rd_data_o	logic[63:0][7:0]$[63:0]	-

Parameters 2

Name	Resolved value
NB_ELEMENTS	32'd64
ELEM_WIDTH	32'd8

Instantiated by

datamover_engine