interface
hci_core_intf
1in
0out
0sub
This module instantiates no other module.
Clocks
clk
Ports 1
Inputs 1
| Dir | Name | Type | Width |
|---|---|---|---|
| in | clk | logic | 1 |
Parameters 11
| Name | Resolved value |
|---|---|
| WAIVE_RQ3_ASSERT | 1'b0 |
| WAIVE_RQ4_ASSERT | 1'b0 |
| WAIVE_RSP3_ASSERT | 1'b0 |
| WAIVE_RSP5_ASSERT | 1'b0 |
| DW | 32'd32 |
| AW | 32'd0 |
| BW | 32'd0 |
| UW | 32'd0 |
| IW | 32'd0 |
| EW | 32'd0 |
| EHW | 32'd0 |
Imports
hci_package::*